Second Semester, AY 2014-2015

  • Reduction of Process Variation Effects on an Amplifier of a 10-bit pipelined ADC and a LDO Regulator Using Digital Circuit Assistance Techniques
    • Bianca Bote, Michael de los Reyes, Maria Lourdes Docdoc
  • Digitally Assisted Analog Amplifiers to Compensate for Supply Voltage Variations
    • Bryan Edward Ayson, Aldon Cris Galido
  • Reduction of Temperature Effects in a Pipelined ADC Residue Amplifier and an LDO
    Error Amplifier Via Digital Assistance

    • Joaquin Carlos Almirante, Jose Maria Guevara, Joel Savier Ng
  • Amplifier Nonlinearity Compensation Using Digitally Assisted Architectures
    • Leo Alfonso Abella, Neil Christian Astrologo, Miro Jan Benedict Navarro
  • Minimizing the Effects of Process Mismatch in 10-b SAR ADC Using Digital Assistance
    • Arvin Wilson Alba, Katrina Claire Hernandez, Reyben Patrick Liwag

First Semester, AY 2015-2016

  • Error Rate Control Through Dynamic Frequency Scaling for Minimum-Energy Point Operation in Razor-Based Processors
    • Eugene John Lim

Second Semester, AY 2015-2016

  • Implementation of Programmable Dynamic Voltage and Frequency Scaling on a Processor for Wireless Sensing Applications
    • Ryan Albert Antonio, Rafael Mari de la Costa, Aldrin Rolf Ison, Wesley Kaiser Lim, Robert Adrian Pajado, Deanne Bianca Roque, Ruelle Martin Yutuc
  • Digital Low Dropout Voltage Regulator with Feedback
    • Dexter Darwin Bernardo, Justine Luis Lopez, Marc Derik Lopez
  • Switched Capacitor Regulator with Feedback
    • John Jairus Eslit, Kate Kristian Olasiman, Antonio Karlos Uy

First Semester, AY 2016-2017

  • ENOB Degradation of an 8-bit 1 Msps SAR ADC in 65nm CMOS under Supply Voltage Scaling
    • Brian Carlo Basco

Second Semester, AY 2016-2017

  • Designing Wireless Transceiver Blocks for LoRa Application
    • Matthew De Vera, Cathlene Mae Garcia, Levi Klein Marifosque, Jessica Palafox, Denise Soriano
  • Design of Sigma-Delta Analog-to-Digital Converters Implemented in 65nm Digital CMOS Process for LoRa
    • Doreen Dellosa, Mel-Jie Bentz Del Mundo, Gelyn Manzanares, Edrian Daniel Marqueses, Edzhel Rose Valverde
  •  A Study on Partial Reconfiguration with Compression via Modularizing Secondary Processes of a General Purpose Processor
    • Eimabelle Clavo de Comer, Vance Anthony Coronel, Yves Lean Krishner Macayana, Lorenzo Martin Manalac, Alexis Czezar Torreno
  • A Study on the Effects of Dynamic Voltage and Frequency Scaling on an Error Detection System for a LoRa Communications System
    • Jahn Caroll Dimayuga, Ian Christian Fernandez, Alfonso Elias Lopez, Rafael Pangilinan
  • Designing a Maximum Power Point Tracking System and an LDO Regulator for Interface Circuits of Solar Energy Harvesters for LoRa Sensor Nodes
    • Marc Anthony Huab

First Semester, AY 2017-2018

  • A 2.4GHz Energy-efficient Short-range Receiver with Variable Gain and Wake-up for Wireless Sensor Networks
    • George Procyon Cabrera, Jhelsea Credo, Gio Ishmael Evidente, Ralen Rose Gloria Malatbalat, Steven Lorenz Mindoro, Arlo Ricardo Sanico