- Analog Integrated Circuits
- Schedule:
- Lectures: Tuesdays and Thursdays, 10am-11:30am, EEEI 307
Announcements
- 8/9: Welcome to EE 220!
- 8/31: Assignment #1 is here, due 5pm, Friday, 9/16
- 9/16: Assignment #2 is here, due 5pm, Friday, 9/30
- 10/17: Assignment #3 is here, due 5pm, Friday, 10/28
- 11/21: Project specifications are here, due 5pm, Wednesday, 12/21
Class Lectures
| Title | Slides | |
|---|---|---|
| 1 | Introduction | |
| 2 | CMOS Technology and Passive Devices | |
| 3 | CMOS Technology and Passive Devices | |
| 4 | MOS Transistor Modeling | |
| 5 | Design Driven Small Signal Models | |
| 6 | Design Driven Small Signal Models | |
| 7 | Electronic Noise | |
| 8 | Noise Analysis | |
| 9 | Review of Feedback | |
| 10 | Feedback Analysis | |
| 11 | Noise and Feedback | |
| 12 | Current Sources | |
| 13 | Amplifiers | |
| 14 | Single-Ended and Differential OTAs | |
| 15 | Folded-Cascode OTAs | |
| 16 | Feedback and Stability | |
| 17 | Settling | |
| 18 | Settling | |
| 19 | A Design Example | |
| 20 | Common-Mode Feedback | |
| 21 | Multi-Stage Amplifiers | |
| 22 | Biasing and References | |
| 23 |
Reading List
- T. Skotnicki, J. A. Hutchby, Tsu-Jae King, H. S. P. Wong and F. Boeuf, “The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance,” in IEEE Circuits and Devices Magazine, vol. 21, no. 1, pp. 16-26, Jan.-Feb. 2005.
doi: 10.1109/MCD.2005.1388765
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1388765&isnumber=30229 - Analog: Back to the Future – Part 1, Part 2, Part 3
- The Laplace Transform: Motivating the Definition (pdf)
References
- Gray, Hurst, Lewis, Meyer, Analysis & Design of Analog Integrated Circuits, Wiley 2001.
- Johns, Martin, Analog Integrated Circuit Design, Wiley 1997.