• Digital Integrated Circuits
• Lectures: Tuesdays and Thursdays, 5:30-7:00PM, Rm 421 (EEEI)
• Instructor: Chris Vincent J. Densing

Announcements

• 12/11: Take home final exam can be found here. Deadline is on Saturday, Dec 13, 2014, 5pm (through e-mail).
• 12/9: I won’t be posting the final exam until the storm passes. Expect the final exam to be posted on either Thursday or Friday (Dec 11/12)
• 10/17: No classes next week. Work on your project proposals and submit them on Thursday next week
• 10/8: Please start reading up on potential class projects. Deadline for project proposal (by pairs) on Oct 23.
• 9/22: No class tomorrow, Sept 23, Tuesday. Please continue working on your homework.
• 9/17: No class tomorrow, Sept 18, Thursday. Please start working on your homework. The homework can be found here.
• 9/2: No class today. I’ll see you on Thursday.
• 8/15: No class on Tuesday (8/19) and Thursday (8/21)
• 8/7: Please accomplish the student information form found here and send a 300pixel X 300pixel ID picture to snapdensing@gmail.com. Use the following subject in your e-mail: “EE 226 ID pic”
• 8/7: Welcome to EE 226!

Lecture Slides

• 8/12: Class Policies
• 8/14: Scaling Trends and Technology Features
• 8/26: Scaling Trends and Technology Features
• 8/28: Models
• 9/4:   Models
• 9/9:   Delay
• 9/11: Standard Cells
• 9/16: Variability
• 9/30: SRAM
• 10/2: SRAM
• 10/7: SRAM
• 10/14: Timing
• 10/16: Timing
• Latches and Flip-flops 1
• Latches and Flip-flops 2
• Review of Dynamic Logic
• Power-Performance Tradeoffs
• Supply Voltage Reduction
• Dynamic Voltage Scaling
• Active Power Reduction
• Leakage Power Reduction
• Optimal Supply and Threshold

Other Links

• 45nm process SPICE model file here